Item type |
学術雑誌論文 / Journal Article(1) |
公開日 |
2023-02-28 |
タイトル |
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タイトル |
On the Effect of Scheduling in Test Generation |
言語 |
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言語 |
eng |
キーワード |
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主題 |
test generation |
キーワード |
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主題 |
test generation schedule |
キーワード |
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主題 |
fault ordering |
キーワード |
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主題 |
fault dominance |
キーワード |
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主題 |
cost of testing |
資源タイプ |
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資源タイプ識別子 |
http://purl.org/coar/resource_type/c_6501 |
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資源タイプ |
journal article |
著者 |
INOUE, Tomoo
MAEDA, Hironori
FUJIWARA, Hideo
井上, 智生
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抄録 |
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内容記述タイプ |
Abstract |
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内容記述 |
The order of faults which are targeted for test-pattern generation affects both of the processing time for test generation and the number of generated test-patterns. This order is referred to as a test generation schedule. In this paper, we consider the effect of scheduling in test generation. We formulate the test generation scheduling problem which minimizes the cost of testing. We propose schedulings based on test-pattern generation time, dominating probability and dominated probability, and analyze the effect of these schedulings. In the analysis, we show that the total test-pattern generation time and the total number of test-patterns can be reduced by the scheduling according to the descending order of dominating probability prior to the ascending order of test-pattern generation. This is confirmed by the experiments using ISCAS'85 benchmark circuits. Further, in the experiments, we consider eight schedulings, and show that the scheduling according to the ascending order of dominated probability is the most effective of them. |
書誌情報 |
IEICE Transactions on Information and Systems
巻 E79-D,
号 8,
p. 1190-1197,
発行日 1996-08-20
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出版者 |
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出版者 |
電子情報通信学会(IEICE) |
ISSN |
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収録物識別子タイプ |
ISSN |
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収録物識別子 |
0916-8532 |
権利 |
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権利情報 |
copyright©1996 IEICE |
関連サイト |
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識別子タイプ |
URI |
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関連識別子 |
http://www.ieice.org/jpn/trans_online/index.html |
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関連名称 |
http://www.ieice.org/jpn/trans_online/index.html |
フォーマット |
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内容記述タイプ |
Other |
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内容記述 |
application/pdf |
著者版フラグ |
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出版タイプ |
VoR |
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出版タイプResource |
http://purl.org/coar/version/c_970fb48d4fbd8a85 |