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A Self-Test of Dynamically Reconfigurable Processors with Test Frames INOUE, Tomoo イノウエ, トモオ FUJII, Takashi フジイ, タカシ ICHIHARA, Hideyuki イチハラ, ヒデユキ 井上, 智生 市原, 英行 dynamically reconfigurable processors self-test optimal contexts test application time test frames application/pdf This paper proposes a self-test method of coarse grain dynamically reconfigurable processors (DRPs) without hardware overhead. In the method, processor elements (PEs) compose a test frame, which consists of test pattern generators (TPGs), processor elements under test (PEUTs) and response analyzers (RAs), while testing themselves one another by changing test frames appropriately. We design several test frames with different structures, and discuss the relationship of the structures to the numbers of contexts and test frames for testing all the functions of PEs. A case study shows that there exists an optimal test frame which minimizes the test application time under a constraint. journal article 電子情報通信学会(IEICE) 2008-03-01 VoR application/pdf IEICE Transactions on Information and Systems 3 E91-D 756 762 0916-8532 https://hiroshima-cu.repo.nii.ac.jp/record/1309/files/E91-D_3 _756.pdf https://hiroshima-cu.repo.nii.ac.jp/records/1309 eng http://www.ieice.org/jpn/trans_online/index.html http://www.ieice.org/jpn/trans_online/index.html copyright©2008IEICE